Bird
Computer - ASM68 Cross Macro Assembler
680xx Cross Macro Assembler for the
PC.
Disclaimer:
No warrantee or guarantee of the suitability
of this product for a particular purpose or the correctness of the output is
given.
This program is distributed WITHOUT ANY
WARRANTEE; without even the implied warrantee of MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.
1999-2009 Bird Computer
Terms of Usage
Programs written for ASM68 may be used,
given away or sold without additional fees or license.
Payments:
If you find this software useful please send $79.99
Via PAYPAL: robfinch@sympatico.ca
Or postal mail: cheque made payable to Robert
Finch to the address listed below.
Telephone
1-519-275-2514
Email
Postal
239
Erie St
Stratford,
Ontario, Canada
N5A 2M9
Table of Contents
Program Counter Relative Calculations
A garden variety 80486 (or higher)
compatible computer.
This assembler was built to run in 32 bit Win95/98 environment only.
The software may run by placing it under the "C:\Program Files(x86)" directory system.
asm68.exe -
cross assembler
dasm68.exe -
cross dissassembler
split.exe -
binary file splitter
readme.doc -
documentation update file
<filename>.s - sample source file(s)
Comments
may be inserted into source code by using ';'. The ';' causes everything from
the ';' to the end of the line to be ignored. In order to preserve comments
within a macro definition use ';;' (two semi-colons in a row).
Labels
Only
the first 31 characters of a label or other symbol are significant.
Case Sensitivity
The
assembler is case insensitive when recognizing mnemonics, size specifiers and
registers. For other symbols and labels the assembler is case sensitive.
Errors
during the assembly process are output to stderr.
Operation
This
is a two pass assembler. This is necessary as values of expressions may not be
valid until the second pass if they contain forward references.
The
form '<something>' indicates a mandatory parameter for a command
'[something]' indicates optional parameters.
The
form <size> indicates a size character of 'b', 'w' or 'l'.
The following processors are supported:
68008,68000,68010,68020,68030,68040,68EC030,68EC040,68LC040,CPU32,68851,68881,68882
/o<option list> - set output option
This option sets various output options.
Output options are listed with no spaces between them. Preceding the option
with a '-' negates the option.
b - generate
binary file (default)
l - generate
listing file
s - generate S
record file
y - generate
symbol table
e - generate error
file
:<filename>
- set base output file name
Note binary and S
- record output cannot be selected at the same time. You must select one or the
other.
The
assembler defaults the output file name(s) to the same as the input file name
except for the extension which is set to one of '.bin', '.lst', '.S37', '.sym',
'.err' depending on the output file type . To override the base output file
name specify ':<output file name>' as the last option in the output
option list.
/Gxx -
set processor instruction set
xx
= 00 -> 68000/68008
xx
= 10 -> 68010
xx = 20 ->
68020
xx = 30 ->
68030
xx = 40 ->
68040
xx = EC030 ->
68EC030
xx = EC040 ->
68EC040
xx = LC040 ->
68LC040
xx = CPU32 ->
CPU32
This
option causes the assembler to verify that instructions and addressing modes
are available on the processor level selected. The default is for 68000/68008
instructions. If an instruction for a processor higher than the selected level
is found then an error message is given.
The assembler is capable of generating
several different types of output files. The default is to generate a binary
file, with error messages displayed on the screen. Other output files may be
generated by specifying with the output option (/o) command line option. Other
output files include listing (mixed machine / source code), error (redirection
of errors to a file), symbol table, and S-file format.
Many
assemblers suffix the base mnemonics with various undesirable characters such
as 'i', 'a', or 'q' in order to aid the assembler or make the instruction set
look more complicated. This is not necessary for asm68 as it has some built in
intelligence. However, these alternate forms of mnemonics are still accepted to
enhance portability.
The
assembler will automatically use quick instructions where possible. For example
add.l
#5,d0 will be assembled as if it were addq.l #5,d0
the
assembler also knows about using address registers as destinations. It will
automatically assemble the code
sub.l
#2,a0 as if it were suba.l #2,a0
Using
'i' to indicate immediate mode is not necessary in the assembler since it
places the type of the operand directly with the operand.
add.l #1234,d1 ; this form should be used
addi.l #1234,d1 ;
the 'i' is not necessary but will work
The
assembler will still accept the mnemonic if an 'i' is suffixed, but the '#'
immediate indicator must still precede the immediate operand.
Summary:
As
a programmer you do not have to worry about:
1)
choosing quick immediate mode,
2)
using address forms of mnemonics,
3)
using immediate forms of mnemonics.
asm68
removes these burdens from you.
The assembler has a default operation size
of long. Long operations do not require the use of the size specifier
character. Also if no size is specified on some operations for which there is
no long size then a word size will be assumed. For example chk, and link
instructions for the 68000/08/10.
add.l #1234,d0 ;
specified long op size
add #1234,d0 ;
will default to long operation size
Some
mnemonics do not require a size specifier. If one is specified it may be used,
ignored, or cause an error or warning message.
move #123,ccr ;
move to condition code register
move.b
#123,ccr ; still accepted
move.w
#123,ccr ; gives error, but
generates code for
;
move #123,ccr
Byte size operations on the status register
will translate to operations on the condition code register 'ccr'.
move.b
#123,sr will translate to move
#123,ccr
The
comma is used to distinguish between source and destination operands. Because
the comma is used in this fashion, the assembler uses the '+' to separate
registers when representing indexed addressing using square brackets.
Square
brackets are used to represent indexing in the indexed addressing modes. This
was done to avoid confusion with round brackets. Round brackets may appear in
an expression adjacent to the square brackets, as in indexed with displacement
addressing modes. Square brackets are also generally used to represent indexing
in most languages. Even though the native format of the assembler uses square
brackets round brackets are still accepted.
This
assembler uses 'C' style incrementation and decrementation operators. Note that
the incrementation / decrementation operators are placed within the indexing
brackets. This is done to follow the convention that the operator is closest to
the thing that it is working on. A notation such as [a0]++ would have implied
that the value at the location indicated by the a0 register is being
incremented. This is not actually the case with 68000 increment/decrement
operators. [a0++] more clearly indicates what is going on. The a0 register is
being incremented, after being used, and not to what a0 is pointing.
Immediate
operands are identified by being preceded with a '#'.
Absolute
short and long address operands may be identified by appending a '.w' or '.l'
to the address expression. If not otherwise specified the assembler uses the
address mode based on the size of the symbol. If the size is unknown at the
time of assembly then absolute long address mode is assumed.
Upper
or lower case characters may be used when specifying registers.
If no scale is
specified for the index register then a scale of one is assumed. If no size is
specified then a size of long is assumed.
For memory
indirect and based address modes index register suppression may be indicated by
prepending a 'z' to the index register name as in ([bd,An],zd0,od).
Examples:
asm68
format:
move.l [a0++],16[a7] ;
Note the 16 may be an expression.
move.l [a0++],(16*(aa)+1)[a7] ; a little easier to see ; than below
Alternate
formats:
move.l (a0)+,(16,a7)
move.l (a0)+,(16*(aa)+1,a7) ; note label aa will ; confuse the assembler
Note
that while the native format of the assembler is to use square brackets round
brackets are still recognized.
Program Counter
Relative Calculations
In program counter relative address modes if
a single label is used in the displacement expression it is assumed that the
resulting expression is to be relative to the program counter, so the program
counter value is subtracted from the expression to generate the displacement.
If no or two or more labels are used in the displacement expression it is
assumed that the desired displacement is to be calculated and the program
counter value is not subtracted from the expression.
Example:
move
pcreltbl+5(pc),d0 ; this will calculate the displacement by subtracting the PC
value
move
pcreltbl2-pcreltbl+5(pc),d0 ; this will not subtract the PC value from the
calculated displacement
pcreltbl: dc.l
1,2,3,4
pcreltbl2: dc.l
1,2,3,4
Register
lists used with the movem instruction may be specified in several manners. The
'REGS' keyword is optional.
as
a range of register as in
movem.l
regs d0-7,[--a7] ; save
data regs on stack
movem.l
a0-7d0-7,[--a7] ; save all regs on
stack
Address
and data register ranges must be done separately. The register type 'a' for
address or 'd' for data must precede the range. The range is specified as #-#.
The
following methods allow registers to be identified in any order. For doing a
small group of registers use the register type, then desired register numbers
in any order. Note the 68000 will always store registers in the same order,
regardless of the order you specify. If you require a specific order you must
use independent move instructions.
Example:
movem.l
regs d012,[--a7] ; saves
d0, d1, d2 on stack
movem.l
regs d725,[a0] ; store
d7, d2, and d5
Lastly
registers can also be individually identified by specifying the type then
register number.
Example:
movem.l
[a7++],regs d0d1d2d3a1a2 ; get d0
to d3 and a1,a2 ;
from stack
Note
each register is named individually with no spaces or commas in between.
Some
assemblers use the '/' to separate a sequence of registers. If the assembler encounters
a '/' or space character in the register list, it will be ignored.
Address
Mode Summary
Register
Direct
d0 data register
direct
a0 address register
direct
fp0 floating point
register
Register
Indirect
[a0] address register
indirect
(a0)
[a0++] indirect post incremented
[a0]++
(a0)+
[--a0] pre decremented indirect
--[a0]
-(a0)
32767[a0] indirect with 16 bit
displacement
32767(a0)
127[a0+d0.w] indexed indirect 8 bit displacement
(127,a0,a1.l)
(a0,a1.w) indexed indirect zero
displacement
[a0+d1.l]
Absolute
(AbsoluteLong).l
AbsoluteLong
or AbsoluteLong.l
(AbsoluteShort).w
AbsoluteShort.w
Program
Counter Relative
32767[pc] 16 bit displacement
(32767,pc)
(pc) displacement = -2
127[pc+d0.w] indexed 8 bit displacement
(127,pc,a1.l)
(pc,a2.w) indexed displacement = zero
Immediate
#1234 immediate value
Based
(bd,An,Xn)
(An, Xn)
(Xn)
Memory Indirect
Forms
([bd,An,Xn],od)
Pre indexed
([bd,An,Xn])
([bd,An],Xn,od)
Post indexed
([bd,An],Xn)
([bd,An],od)
Suppressed index
([bd,Xn],od)
Suppressed base
([bd],Xn,od)
([An,Xn],od) base
displacement = 0
([An],Xn,od)
([bd,An]) outer
displacement = 0
([bd,Xn])
([An,Xn])
([bd],Xn)
([bd],od)
suppressed base and index
([An],Xn)
([An],od)
([Xn],od)
([bd])
([An])
([Xn])
The
assembler always uses the short form (8 bit) branch displacements unless
explicitly overridden by appending a '.l' to the branch mnemonic. However this
default is reversed for the branch subroutine (bsr) instruction. Bsr defaults
to using long form (16 bit) displacements unless overridden by appending a '.s'
to the branch mnemonic.
bra elsewhere ; this will always be a shot branch
.
bsr
elsewhere ; this is a long branch.
.
bra.l elsewhere ; '.l' forces a long branch
.
.
.
elsewhere:
Expressions
must always evaluate to constant values. Values within round brackets are
calculated first.
The
'$' is used to represent the value of the location counter, at that point in
code, within an expression.
Example:
bra.s $+4 ; skip over 4 bytes
{
4 bytes of code }
add.w #123,d0
...
The result size of
an expression can be forced by appending a size specifier character to the end.
No warning or error is given if the result won't fit into the forced size. The
result is simply truncated.
The
assembler supports three functions used within expressions:
defined(<symbol>) returns 1 if the symbol is defined,
otherwise 0,
size(<symbol>) returns the size of the
symbol (1,2, or 4)
not(<expression>) returns the logical not of the expression
Listed highest to lowest
|
Operator |
Description |
|
-,~,!,symbol,number,(), defined(), size(), not() |
negative, ones complement, logical not, a label or equate, number, or bracketed expression |
|
*, /, %, <<, >> |
multiply, divide, modulus, left shift, right shift |
|
+, -, &, | |
addition, subtraction, bitwise and, bitwise or |
|
&& |
logical and |
|
|| |
logical or |
|
<,>,=,<=,>=,<>,!= |
less than, greater than, equal, less than or equal, greater than or equal, not equal, not equal |
Note that right shift is a signed operation,
preserving the sign bit.
Numbers
Numbers
are represented using a 'C' style convention. Numbers with a leading zero are
assumed to be octal, see chart below.
0x<hexadecimal
digits> - hexadecimal number
0b<binary
(0 or 1) digits> - binary number
0<octal
digits> -
octal number
0d<decimal
digits> - decimal number
<0-9> - decimal
number (first digit can't be zero)
'<character>' - character constant
Examples:
0xffffffff - -1L in hex
1234 - 1234 decimal
0b11111111 - 255 in binary
'\r' - carriage return
'c' - the letter c
The
assembler currently supports two distinct sections and a keyword is reserved
for a third section. The Two sections supported are the .bss (uninitialized
data) and .code sections. The reason for this level of support is that the
assembler currently does not support grouping or reordering of section data.
Data is processed as it is encountered. The reason the .bss section can be
supported in addition to the code section is that no binary data is output for
the .bss section. The bss section is simply used to update the address of
variable data. This allows the code section to be output as a continuous block.
Future versions of the assembler may support grouping and reordering
operations. See a description of the org pseudo-op on how to set the location
of sections.
There
are no restrictions on how sections are used. You can put code in the .bss
section (but it won't output to the binary file) or data in the code section.
Actually you need to be able to put data in the code section sometimes for tables.
Note if you are putting the code section in ROM be careful not to define any
variables in this section that should be in the .bss section.
Multiline
parameterized macros may be defined via the 'macro' statement. The macro
consists of text between the macro and endm statements. The endm statement must
be the first statement on the line. A macro may have a maximum of 10
parameters. The maximum expanded size of the macro is 2k bytes. Macros may
include other macros (as long as they're defined prior to use) but the maximum
expansion size cannot be exceeded. To create branch addresses and variables
that are local to a particular instance of the macro use the '@' character. The
'@' character will be replaced by the macro instance number (which is unique
for all macro instances) when the macro is instantiated. Note be careful to use
local labels that won't exceed the maximum symbol length(31 chars) including
the instance number. To document the macro using comments, use a single
semi-colon (';') to indicate a comment that may be stripped out for macro
expansions. To preserve comments for an expansion use a double semi-colon
(';;'). Note that preserved comments will use up some of the buffer space for
expansion and reduce the amount of code you can put in the macro. Comments that
are stripped out will reduce the amount of expansion space required.
Macro Limits
Number of parameters 10
Maximum macro expansion 2k
Example:
macro mSomeInlineFn parm1,parm2
move.l parm1,d0 ;
this comment will be removed and not show in expansions
add.l
parm2,d0 ;; this
comment will be preserved
beq
mj@ ;; local to
instance lable
bsr
globalroutine ;; non local
mj@:
endm
global.s
gVar dc.l 1234 ; a globally accessible var
.include lowerfile.s
lowerfile.s
public subrout: ; 'subrout' symbol globally
accessible
<some code>
bra locsym
<some code>
locsym: ; 'locsym' is local to this file
<some more code>
Summary of Pseudo-Ops
align
bss
code
cpu
data
dc
end
endm
equ
even
ffp
fill
include
macro
org
Any
pseudo-op may also be preceded with a period ('.').
align
<expression>
Aligns the current location counter on a
boundary specified by the expression. Padding bytes (0xff) are output to move
the location counter up to the desired alignment address.
Example:
.bss
.align 4 ;
align on longword boundary
var1: dc.l 0
var2: dc.b 0xff
Indicates
that subsequent output is to the bss section (uninitialized data space). The
bss location counter will be updated as data is encountered. Note that no
binary information is output to the .bin file for the bss section. Use the org
statement to set the base address of the .bss section.
Example:
; output to bss section
; actually nothing gets output, but the
symbol addresses still get updated
.bss
.org RAMSTART
var1: dc.l 0
var2: dc.b 0xff
Indicates
that subsequent output is to the code section (program space). The code
location counter will be updated as program code / data is encountered. Data
for the code section will be output to the binary file on the last pass of the
assembler. Use the org statement to set the base address of the .code section.
Example:
; output to code section
.code
.org ROMSTART
jmp
main
cpu <expression>
The
cpu statement sets the instruction set that the assembler allows to be assembled
without errors/warnings. Valid settings are
00,08,10,20,30,40,CPU32,EC030,EC040,LC040,mmu,+mmu,-mmu,fp,+fp,-fp.
When specifying
coprocessor support the default coprocessor id may be overridden by appending a
single digit coprocessor id number to the option.
mmu or +mmu -
enable mmu support (68851) default is enabled
-mmu - disable mmu
support
fp or +fp - enable
floating point (68881/68882) default is enabled
-fp - disable
floating point
Examples:
cpu mmu2 ; enable
mmu support with a coprocessor id of 2
cpu 68010,+fp3 ; 68010 instruction set with
floating point support, coprocessor id of 3
or
cpu 00
or
PROCESSOR equ.l 68000
cpu
PROCESSOR
Indicates
that subsequent output is to the initialized data section (initialized data
space). The data location counter will be updated as data is encountered.
Binary information is output to the .bin file for the data section. Use the org
statement to set the base address of the .data section. This statement is most
useful when using the s-record output file type because the s-record output
allows the location of the data to be indentified for loading. If planning
to use binary output for burning into a ROM this statement should not be used
as it will cause binary data output for the code section to be shifted. Instead
place the data in the code section.
Example:
; output to data section
.data
.org ROMSTART
var1: dc.l 0
var2: dc.b 0xff
dc.<size> [Data values]["Hello there"]
dc
stands for define constant. Data values are separated by commas. Strings may be
used enclosed within quotes. A maximum of 50 data values may be listed
separated by commas for a single dc statement. When the dc statement is used in
the .bss section no data is output (the data values are ignored), however the
.bss location counter is updated by the amount of data present. This is useful
for reserving variables in the .bss section.
Example:
dc.w 'Hello there',0 ; generate UNICODE string.
Would
generate the following bytes in the binary file.
00
48 00 65 00 6C 00 6C 00 ....
Note
that each character in the string is converted to the size specified in the
data statement.
; dc example
msg:
dc.b 'Hi mom!', 0
jmptbl:
dc.l StartOfCode, EndOfCode
org
0xffe000
StartOfCode:
lea
msg,a0
...
When the assembler
encounters the end keyword in the source file it reacts as if the end of the
file has been reached and stops processing the file. End is optional. It is
useful for limiting the source that is assembled.
Example:
.end ; end of source
Indicates
the end of a macro definition.
Example:
macro macro1
;
some source code in the macro
endm
<symbol> equ.<size> <expression>
The
equ statement evaluates the expression and assigns it to symbol. The size specifier
is associated with the symbol.
Example:
CNTRL_WORD1 equ.w 0
CNTRL_WORD2 equ.w CNTRL_WORD1+2
CNTRL_WORD3 equ.w CNTRL_WORD2+2
CNTRL_BUFF equ.w CNTRL_WORD3+2
CNTRL_CODE equ.w CNTRL_BUFF+1024; add buffer for offset
CNTRL_STRUCSIZE equ CNTRL_CODE+2
TABLE_SIZE equ.w 1024
If
the output location is not at an even address 'even' causes the output to be
padded by one byte so that the address is at an even byte boundary. Use before
starting a block of code so that code is assembled to an even boundary. Code
must be assembled on even byte boundaries for the 68000 processor.
The
padding byte used is 0xff.
Example:
even ; make sure code starts at even
byte boundary
start:
move.l d0,a0
...
Indicates to use
fast floating point format when generating constants, as opposed to IEEE format
which is the default.
fill.<size>
<expression>,<expression>
The
fill command is used for initializing an area of memory. (Or reserving a block
in the .bss section).
Example:
fill.l 192,0xffffffff ; fill 192 long words in table
include
<path>
Include
includes another source file within the current one. Nested includes are
allowed until your system runs out of file handles. The path name of the file
must be specified.
Example:
include
..\kern\math.s ; include source
for math routines
include
..\kern\string.s ; include
string routines
start:
move.l d0,a0
....
macro <name>
[parm1][,Parm2]…[parm10]
Indicates
the start of a multiline parameterized macro. (Parameters are optional, max 10
params) See the description of macros in the documentation above.
org <expression>
The
first time the 'org' statement is hit (within a section) it sets the value of
the location counter for which labels are referenced. Subsequent encounters of
the org statement are treated like a 'fill' statement. On subsequent encounters
the output is padded from the current output position to the new one specified
by org. It is possible to create extremely large files this way so be careful !
'0xff' is used as the padding byte. This value was chosen since it is the blank
state of most popular EPROMS.
Example:
org 0xf00000 ;
start of ROM first time encounter
romstart:
moveq #0,d0
....
endcode:
org romstart+0x800 ; output between 'endcode' and new org ;
location is padded with '0xff' bytes.
Errors are output to stderr in the following
form. Error numbers begin at 2000 and work upwards. Not all error numbers are
in use as some numbers were used by prior versions of the assembler.
[E|W]xxx (line <line number>):
description
E/W -
Error or Warning
xxx -
error number
E2001 "unbalanced parentheses"
An
expression contains an odd number of parentheses
E2002 "division by zero"
The
denominator of expression is equal to zero
E2003 "undefined symbol
'<symbol>'"
The
symbol is not defined anywhere within program
E2004 "'<symbol>' already
defined"
The
symbol has already been assigned a value
E2005 "wrong length"
The
size specifier is not allowed for the instruction or operand.
E2006 "expecting a register"
A register specification
was expected but not found.
E2008 "invalid instruction or
argument"
The
assembler hit something it couldn't recognize
E2011 "phasing error - '<symbol>'
value different on second pass"
During
the second pass of the assembler the value of the symbol was different than
that of the first pass.
W2012 "unknown command line switch
'<argument>' ignored"
The only valid
command line switches are /o and /G. Switches are case-sensitive
E2013 "unable to open file
'<filename>'"
E2014 "no closing quotes"
E2015 "can not calculate mod(0)"
E2016 "invalid register number
<reg>"
E2018 "more memory required than is
available"
W2026 "operand addressing mode '%s' not
supported by selected processor"
E2027 "extra ')'"
E2028 "branch out of range displacement
<displacement>",
A
short branch was specified but the destination is out of range or the
displacement is too great for a long branch.
W2029 "word assembled on odd address -
output padded with zero byte"
The
location counter for the code segment was at an odd address when attempting to
output code. This could be due to the use of tables in the code section. Use
'even' pseudo-op to align the location counter on an even address.
W2030 "<value> too big for
immediate data - truncated"
The immediate
value supplied to the breakpoint instruction was too large.
W2031 "<value> too big for shift
count - truncated",
The immediate
value specified for a shift count was too large. Only values from 1 to 8 are
acceptable.
W2033 "quick immediate data
(<value>) truncated",
The immediate
value specified for addq/subq/moveq instructions was out of range. Allowable
values are from 1 to 8 for addq/subq and -128 to 127 for moveq.
E2034 "error writing output",
W2035 "invalid label '<label>' -
ignored",
E2036 "byte size not supported with
address registers"
An attempt was
made to perform a byte size operation on an address register. Address registers
support only word or long word operations.
W2037 "'<size code>' illegal size
for status register operation - assuming word size"
Only word and byte
size operations are allowed on the status register.
W2038 "'<size code>' only byte
operations allowed on ccr - assuming byte size"
E2039 "invalid operand
'<operand>'",
The
operand is not valid for use with the instruction or it is an unrecognizable
operand.
W2040 "only long ('l') size
supported",
The
moveq instruction and move to/from USP only support long operation sizes. The
assembler will generate code for a long size operation.
W2041 "instruction
'<instruction>' not supported by selected processor",
The
assembler encountered an instruction that is not supported by the selected
processor level.
W2042 "displacement %lx too large"
The displacement
specified for a register indirect operand is too large.
W2043 "assembler does not support %ld
processor"
The CPU directive
specified a processor not supported by this assembler.
E2046 "source operand '<source
operand>' must be immediate"
An immediate mode
instruction was specified (eg addq / andi) but an immediate operand was not supplied.
You must use the '#' to indicate an immediate value.
E2048 "expecting <number of
operands> operand(s)"
The number of
operands supplied does not match the number required by the instruction.
W2049 "only byte ('.B') size
supported"
The abcd / sbcd /
set instructions only support byte operations.
W2050 "too many operands - extra
operands ignored"
There is a maximum
of 60 operands (used for dc directive).
W2051 "no assembler output for shift of
zero count"
An immediate shift
count of 0 was specified so the assembler bypasses generation of code for the
shift.
W2052 "only word ('.W') size
supported"
A memory shift
operation was specified. Memory shifts only support word size.
W2053 "index scaling '<scale>'
not supported on selected processor"
E2054 "expecting a macro name"
The name of the
macro is expected after the macro directive, but a valid name was not found.
E2055 "expecting ',' separator in macro
definition"
An unknown
character was encountered in the macro parameter list where a comma was
expected.
E2056 "too many files."
A maximum of 255
files may be processed by the assembler.
E2057 "defined needs a symbol
name"
The
defined(<symbol name>) function (expression evaluation) requires a symbol
name.
E2058 "error in expression"
Something was
encountered in an expression that the expression parser was unable to resolve.
W2059 "extra '.' ignored"
A dot indicating a
pseudo-op was encountered, however it was not followed by a pseudo-op.
E2060 "size needs a symbolic name"
The size()
function (expression evaluation) needs a symbol name and one was not supplied.
E2061 "public needs an address
label"
The public
directive needs an address label to declare public.
E2063 "too many macro parameters"
Too many
parameters were encountered in a macro parameter list.
E2064 "incorrect number of macro
arguments were passed"
A macro
substitution was indicated in source code, but the number of parameters passed
did not match the number of parameters in the macro definition.
E2066 "macro too large"
The macro
definition or expansion is too large. A maximum expansion of 2048 characters is
allowed.
E2067 "unrecognized characters on
line"
Extra characters
were encountered in the input line that could not be processed as part of a
valid instruction or directive. Use a semi-colon to indicate comments on a
line.
E2068 "extra 'endm' encountered"
An endm was
encountered without a corresponding macro directive.
E2081 "only bits 0-%d available for
operation"
The bit number
specified is greater than the number of bits that can be processed by the bit
instruction. If the destination is a data register only the long size is
supported which is bits 0 to 31. If the destination is memory then only byte
operations are supported meaning bits 0 to 7.
E2082 "invalid register list '%s'"
Something that
could not be parsed as part of a register list was encountered.
Split.exe is a small utility that takes a
binary ('.bin') file as input and generates two binary files as output ('.odd'
and '.evn'). This is useful for splitting the binary data so that it may be
programmed into a pair of EPROMS.
dasm68.exe dissassembles binary files into
68000 assembler language code. This is useful for seeing where the assembler
selected an alternate instruction form such as moveq instead of move. It can
also be used for checking the output of the assembler. What is output by the
dissassembler should correspond to the source listing.
dasm68 does not check for all invalid
encodings of instructions. For instance an instruction may have a restriction
on the address modes available but if an illegal mode is encoded in the
instruction dasm68 will output dissassembly for the instruction as if the
encoding were legal. dasm68 assumes it is being given a valid instruction
stream, however if it encounters something it can't decode it will output it as
constant.
Currently dasm68 only supports decoding for
68000/08/10/20 processors.
Index
Branches'13
Comments'6
end'24
endm'25
equ'26
Errors'32
even'27
Expressions'14
Files'5
fill'28
include'29
Mnemonics'31
Numbers'14
org'30
Precedence'14
Register
list'11
Section'16