AppleSauce - Apple II / II+ Emulator

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This demo system has been implemented on a BurchEd B5X300 FPGA board. A RAM module is connected to ports A and B, and an IO module is connected to port C. The programmable PLL clock must also be set for a clock frequency of 57.27272MHz. The following clock jumpers must be shorted: V3,6,7,8; S1,2; and R0,1,3,5,6 the remaining jumpers are open.

Features

The system emulates an Apple II / II + computer. There are many sources of information on the Apple II available on the web. Emulation isn't 100% accurate. There are additional peripherals decoded into the $CF00 address range, including the uart @$CF00 (bc_uart) used to download the ROM software.

The system is capable of running Apple Integer BASIC or Applesoft ROM BASIC.

Note:

The goal of this system was not to create the perfect emulation of the Apple II computer. The goal was to demonstrate a working 6502 core. The Apple II was chosen for it's relative simplicity and available software. Hopefully over time the emulation will improve.

Hires graphics emulation is less than perfect.....

System Boot

The system boots from an internal boot ROM that is disabled once the Apple II / II+ ROM images are loaded. The boot program simply waits at the serial port for a secondary boot program (BR5.hex) to be downloaded. This second program performs another download by waiting for the Apple II ROM image to be downloaded. This ROM image must be downloaded in an Intel Hex file format. The serial port settings are 38k baud, 8 bits, no parity, 1 start, 1 stop bit - hardware flow control (cts, rts). Apple II / II+ ROM images are available at several download sites on the web. It is necessary to convert the binary image into an Intel Hex file for download. The bin2hex utility can be used to do this.

It may be necessary to press reset on the FPGA board to initialize the system. When the system boots, the screen will be in text mode with random characters displayed on the screen. The second character on the screen will be changing rapidly to indicate that the boot program is waiting for a serial download.

The system can be reset by pressing CTRL-ALT-DEL from the keyboard.

The boot program (br5) contains serial I/O routines. It is possible to load and save BASIC programs through the serial port by switching input / output devices.

Steps for booting:

  1. use a cable to connect the serial port on the PC to the BurchED IO module
  2. power on the BurchEd board
  3. program the FPGA hardware to emulate the Apple II with the .mcs file provided (use the impact utility provided with Xilinx WebPack software)
  4. run the serial communications program (eg hyperterminal) on the PC
  5. press reset on the FPGA board (the test button). At this point a message should appear on the PC comm. program "SEND IN INTEL HEX FMT"
  6. use hyperterminal or some other serial communications program to send the boot program "BR5.hex". Hatches should appear on the screen as the download is occuring. It it quite fast.
  7. the message "SEND IN INTEL HEX FMT" should appear in the comm. program again.
  8. use the comm program to send an Intel hex file format copy of the ROM image.

 

Downloads

Note: you must have a genuine copy of the Apple ROMS in order to use these !!!

AppleSauce.zip    - bit file to load the FPGA with the AppleSauce Emulator, boot program, ROM images as Intel Hex Format